The symposium is designed to bridge the closed technology loop covering manufacturing processes, packaging integration and embedded applications. It will focus on core themes including high- performance chip fabrication for industrial-grade embedded AI, customized computing acceleration based on RISC-V, System-in-Package (SiP) and 2.5D/3D heterogeneous integration technologies, as well as real-world deployments of machine vision for advanced packaging inspection and embedded systems. We will gather leading enterprises spanning chip design, packaging & testing, EDA tools, system integration and complete machine manufacturing to discuss how application demands drive semiconductor technological innovation and accelerate the efficient industrial implementation of chips in end devices.

Key focus
• High-performance Chip Fabrication Processes for Embedded AI
• RISC-V-Based Embedded AI Solutions
• Packaging Technology for Embedded Chips: Applications in AI and Automotive Electronics
• 2.5D & 3D EDA and STCO Co-Design Methodology
• SiP Technologies Enabling Miniaturization and Modularization of Embedded End Devices
• Chip-Level Solutions for Embedded Machine Vision Systems
• High-Performance Embedded Systems: Design Challenges & Deployments in Industrial Vision and AI Quality Inspection
• Vision Inspection Challenges and AI-Driven AOI Solutions for Advanced Packaging
• Packaging Reliability and System Integration of Automotive-Grade Embedded Chips
• Embedded Vision Applications in Embodied Intelligence and Smart Edge Terminals

Click here to view detailed information and submission guidelines for Track 2